Electromigration Modeling at Circuit Layout Level

Feifei He

ISBN 10: 9814451207 / ISBN 13: 9789814451208

Published by Springer Nature Singapore, Springer, 2013

About this Item

Druck auf Anfrage Neuware - Printed after ordering - Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.

Seller Inventory # 9789814451208

Bibliographic Details

• Title: Electromigration Modeling at Circuit Layout Level
• Publisher: Springer Nature Singapore, Springer
• Publication Date: 2013
• Language: English
• ISBN 10: 9814451207
• ISBN 13: 9789814451208
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 7D millimeters 235 millimeters width by 155 millimeters height by 7 millimeters depth
• Weight: 189 grams

About this title

Synopsis

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.