A Fast Feedback Control System using FPGA for RF signals | A digital LLRF Fast Feedback Control System based on I/Q Detection & Modulation technique for Particle Accelerator

Joydip Jana (u. a.)

ISBN 10: 3659216771 / ISBN 13: 9783659216770

Published by LAP Lambert Academic Publishing, 2013

About this Item

A Fast Feedback Control System using FPGA for RF signals | A digital LLRF Fast Feedback Control System based on I/Q Detection & Modulation technique for Particle Accelerator | Joydip Jana (u. a.) | Taschenbuch | Englisch | LAP Lambert Academic Publishing | EAN 9783659216770 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

Seller Inventory # 106087625

Bibliographic Details

• Title: A Fast Feedback Control System using FPGA for RF signals | A digital LLRF Fast Feedback Control System based on I/Q Detection & Modulation technique for Particle Accelerator
• Publisher: LAP Lambert Academic Publishing
• Publication Date: 2013
• Language: English
• ISBN 10: 3659216771
• ISBN 13: 9783659216770
• Binding: Taschenbuch
• Condition: Neu
• Seller catalogs:
  • Bücher

About this title

Synopsis

In accelerators, RF system is required to produce electromagnetic fields in accelerating structures that interact with charged particles and accelerate them. The performance of an accelerator depends on the stability of the RF field inside the cavity. The stability of the RF field inside the cavity is strongly affected by interfering noise and non-linear effect of active components of the entire RF amplifier chain feeding power to the RF cavity and also on the beam loading. For proper operation of the machine, amplitude and phase of the accelerating fields should be very stable (within 1% in amplitude and 1° in phase) and is achieved by low level RF feedback (LLRF) system. After achievement of desired performance from the developed digital fast feedback control system using FPGA, rapid prototyping capabilities of FPGA was highly appreciated and as time required for any digital logic development using FPGA is very less, it was proposed to develop a FPGA based frequency tuning loop for Indus machine.

About the Author

Joydip Jana is pursuing PhD on PV System in Bengal Engineering & Science University, the first institute to actually be granted the IIEST status. He pursued his M.Tech project in RRCAT (Department of Atomic Energy, Govt. of India. He is currently engaged in development of a FPGA controlled 3-Phase Grid Interactive (Transformer less) 10KW PV System)