Functional Design Errors in Digital Circuits

Kai-Hui Chang

ISBN 10: 9048181127 / ISBN 13: 9789048181124

Published by Springer Netherlands Okt 2010, 2010

About this Item

This item is printed on demand - it takes 3-4 days longer - Neuware -Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices. 224 pp. Englisch.

Seller Inventory # 9789048181124

Bibliographic Details

• Title: Functional Design Errors in Digital Circuits
• Publisher: Springer Netherlands Okt 2010
• Publication Date: 2010
• Language: English
• ISBN 10: 9048181127
• ISBN 13: 9789048181124
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 13D millimeters 235 millimeters width by 155 millimeters height by 13 millimeters depth
• Weight: 347 grams

About this title

Synopsis

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

About the Author

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors