Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

Language: English

Published by Springer, 2017

3319604015 / 9783319604015

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

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Druck auf Anfrage Neuware - Printed after ordering - This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.

Seller Inventory # 9783319604015

Title
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Author
Adam Teman
Publisher
Springer
Publication year
2017
Condition
Neu
Binding
Buch
Language
English
ISBN 10
3319604015
ISBN 13
9783319604015
Item weight
407 grams
Dimensions
241x160x15 mm

AHA-BUCH GmbH

Einbeck, Germany

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