This popular book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in design choices and shows how good designs make efficient use of technology.

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Bibliographic Details

Title: High Performance Computer Architecture
Publisher: Pearson Education (US)
Publication Date: 1993
Language: English
ISBN 10: 0201526883
ISBN 13: 9780201526882
Binding: Hardback
Edition: 3rd Edition
Condition: Fair

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Synopsis

This update of the popular book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in designing choices, and shows how good designs make efficient use of technology. This new edition details the latest developments with high-performance machines; including enhanced descriptions of RISC processors. The material on Cache Memory Analysis has been expanded and additional memory models and techniques for doing Cache design have also been included.

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design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in designing choices, and shows how good designs make efficient use of technology. Features Teaches techniques for the design and analysis of high-performance machines Develops students' intuition for design by treating various tradeoffs that exist in design choices Discusses many important topics: RISC architectures, interconnection meshes, Cache coherent and multiprocessors, and Cache Memory. Includes enhanced descriptions of RISC Processors Expands material on Cache Memory Analysis Current technology in RISC with a focused look on super scalar Additional memory models and techniques for doing Cache design New porposals for coherent memory systems in System C parallel processors Both design and thought problems and problems with limiting parameters are provided

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