High Speed Digital System Design : A Handbook of Interconnect Theory and Design Practices

A cutting-edge guide to the theory and practice of high-speed digital system design

An understanding of high-speed interconnect phenomena is essential for digital designers who must deal with the challenges posed by the ever-increasing operating speeds of today's microprocessors. This book provides a much-needed, practical guide to the state of the art of modern digital system design, combining easily accessible explanations with immensely useful problem-solving strategies. Written by three leading Intel engineers, High-Speed Digital System Design clarifies difficult and often neglected topics involving the effects of high frequencies on digital buses and presents a variety of proven techniques and application examples. Extensive appendices, formulas, modeling techniques as well as hundreds of figures are also provided.
Coverage includes:
* A thorough introduction to the digital aspects of basic transmission line theory
* Crosstalk and nonideal transmission line effects on signal quality and timings
* The impact of packages, vias, and connectors on signal integrity
* The effects of nonideal return current paths, high frequency power delivery, and simultaneous switching noise
* Explanations of how driving circuit characteristics affect the quality of the digital signal
* Digital timing analysis at the system level that incorporates high-speed signaling effects into timing budgets
* Methodologies for designing high-speed buses and handling the very large number of variables that affect interconnect performance
* Radiated emission problems and how to minimize system noise
* The practical aspects of making measurements in high-speed digital systems

STEPHEN H. HALL is a Senior Design Engineer at Intel Corporation, Portland, Oregon.

GARRETT W. HALL is a Silicon Systems Engineer at Intel Corporation.

JAMES A. McCALL is a Senior Design Engineer at Intel Corporation.