High-performance Computer Architecture

Stone, Harold S.:

ISBN 10: 0201168022 / ISBN 13: 9780201168020

Published by Addison-Wesley Educational Publishers Inc, 1987

About this Item

411 p. Good condition. The pages are clean and without markings. Slight signs of storage and use. Retired library copy with corresponding markings. Inside fold torn, pages are firm. Otherwise, a neat copy. 9780201168020 Sprache: Englisch Gewicht in Gramm: 1000.

Seller Inventory # 317549

Bibliographic Details

• Title: High-performance Computer Architecture
• Publisher: Addison-Wesley Educational Publishers Inc
• Publication Date: 1987
• Language: English
• ISBN 10: 0201168022
• ISBN 13: 9780201168020
• Binding: Hardcover
• Seller catalogs:
  • Informatik

About this title

Synopsis

This book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in design choices and shows how good designs make efficient use of technology.

From the Back Cover

This update of the popular book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in designing choices, and shows how good designs make efficient use of technology.

Features

• Teaches techniques for the design and analysis of high-performance machines
• Develops students' intuition for design by treating various tradeoffs that exist in design choices
• Discusses many important topics: RISC architectures, interconnection meshes, Cache coherent and multiprocessors, and Cache Memory.
• Includes enhanced descriptions of RISC Processors
• Expands material on Cache Memory Analysis
• Current technology in RISC with a focused look on super scalar
• Additional memory models and techniques for doing Cache design
• New porposals for coherent memory systems in System C parallel processors
• Both design and thought problems and problems with limiting parameters are provided

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