INTERCONNECT NOISE OPTIMIZATION IN NANOMETER TECHNOLOGIES (HB)
Language: English
Published by SP SPRINGER, 1992
- Hardcover
- New
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Condition: New
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Seller Inventory # CbS 9780387258706
- Title
- INTERCONNECT NOISE OPTIMIZATION IN NANOMETER TECHNOLOGIES (HB)
- Author
- ELGAMEL M.
- Publisher
- SP SPRINGER
- Publication year
- 1992
- Condition
- New
- Binding
- Hardcover
- Language
- English
- ISBN 10
- 0387258701
- ISBN 13
- 9780387258706
- Edition
- International Edition
Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.
The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered.
"Synopsis" may belong to another edition of this title.
From the Back Cover
Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.
The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered.
"About the title" may belong to another edition of this title.
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