Implementation of a Binary Floating Point Fused Multiply-Add Unit

Language: English

Published by LAP LAMBERT Academic Publishing Dez 2012, 2012

3846546216 / 9783846546215

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them. 104 pp. Englisch.

Seller Inventory # 9783846546215

Title
Implementation of a Binary Floating Point Fused Multiply-Add Unit
Author
Walaa Abdel Aziz Ibrahim
Publisher
LAP LAMBERT Academic Publishing Dez 2012
Publication year
2012
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3846546216
ISBN 13
9783846546215
Item weight
173 grams
Dimensions
220x150x7 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

Shipping rates from Germany to U.S.A.

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BuchWeltWeit Ludwig Meier e.K.

Germany