An Improved Mosfet I-V Model and Its Application in Nano-CMOS Circuits

Samanta, Jagannath; Singh, Asish Kumar

ISBN 10: 3659447528 / ISBN 13: 9783659447525

Published by VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2013

About this Item

PRINT ON DEMAND pp. 72.

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Bibliographic Details

• Title: An Improved Mosfet I-V Model and Its Application in Nano-CMOS Circuits
• Publisher: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG
• Publication Date: 2013
• Language: English
• ISBN 10: 3659447528
• ISBN 13: 9783659447525
• Binding: Soft cover
• Condition: New

About this title

Synopsis

A compact MOSFET I-V model for estimating the drain current of sub-90nm MOSFET in the linear and saturation regions is proposed. It is a modification of nth-power law model introduced by Sakurai and Newton. The proposed model provides more accurate relationship between the channel length modulation and gate voltage in the saturation region. New parameters are introduced for better characterization of drain current of MOSFET at lower VGS and VDS. The proposed model is compared with Modified Sakurai-Newton (MSN) Current model and Extended-Sakurai-Newton (ESN) Compact MOSFET model, and it is found that the proposed model is much more accurate. The model provides precise estimation of drain current as well as the delay of a CMOS inverter. The drain characteristics predicted by the proposed model match with BSIM4v7 simulation with an average error of 1.33% and the delay estimations of CMOS inverter have an average error of 0.03 %( 0.12% maximum) in 90nm process technology.

About the Author

Mr. Jagannath Samanta is serving as an Assistant Professor in the ECE dept at Haldia Institute of Technology, Haldia,WB. His research interest includes in Digital VLSI Design, Error Control Correction. Mr. A.K. Singh is a PhD scholar, Dept. of Mechatronics, GIST in South Korea. His research interest includes MOSFET Modeling, Embedded Systems.