Improving Performance and Reducing Power with Hardware Acceleration: Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow
Colin J. Ihrig
Sold by Chiron Media, Wallingford, United Kingdom
AbeBooks Seller since August 2, 2010
New - Soft cover
Condition: New
Ships from United Kingdom to U.S.A.
Quantity: 10 available
Add to basket