Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation : 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers

José Monteiro

ISBN 10: 3642118011 / ISBN 13: 9783642118012

Published by Springer, Springer Spektrum, 2010

About this Item

Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the thoroughly refereed post-conference proceedings of 19th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2009, featuring Integrated Circuit and System Design, held in Delft, The Netherlands during September 9-11, 2009. The 26 revised full papers and 10 revised poster papers presented were carefully reviewed and selected from numerous submissions. The papers are organized in topical sections on variability & statistical timing, circuit level techniques, power management, low power circuits & technology, system level techniques, power & timing optimization techniques, self-timed circuits, low power circuit analysis & optimization, and low power design studies.

Seller Inventory # 9783642118012

Bibliographic Details

• Title: Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation : 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers
• Publisher: Springer, Springer Spektrum
• Publication Date: 2010
• Language: English
• ISBN 10: 3642118011
• ISBN 13: 9783642118012
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 21D millimeters 235 millimeters width by 155 millimeters height by 21 millimeters depth
• Weight: 581 grams

About this title

Synopsis

This book constitutes the thoroughly refereed post-conference proceedings of 19th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2009, featuring Integrated Circuit and System Design, held in Delft, The Netherlands during September 9-11, 2009. The 26 revised full papers and 10 revised poster papers presented were carefully reviewed and selected from numerous submissions. The papers are organized in topical sections on variability & statistical timing, circuit level techniques, power management, low power circuits & technology, system level techniques, power & timing optimization techniques, self-timed circuits, low power circuit analysis & optimization, and low power design studies.