Introduction to Logic Synthesis using Verilog HDL

Language: English

Published by Springer, 2007

3031797426 / 9783031797422

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

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Druck auf Anfrage Neuware - Printed after ordering - Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics. The book contains numerous Verilog examples that begin with simple combinational networks and progress to synchronous sequential logic systems. Common pitfalls in the development of synthesizable Verilog HDL are also discussed along with methods for avoiding them. The target audience is anyone with a basic understanding of digital logic principles who wishes to learn how to model digital systems in the Verilog HDL in a manner that also allows for automatic synthesis. A wide range of readers, from hobbyists and undergraduate students to seasoned professionals, will find this a compelling and approachable work. The book provides concise coverage of the material and includes many examples, enabling readers to quickly generate high-quality synthesizable Verilog models.…

Seller Inventory # 9783031797422

Title
Introduction to Logic Synthesis using Verilog HDL
Author
Robert B. Reese
Publisher
Springer
Publication year
2007
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3031797426
ISBN 13
9783031797422
Item weight
176 grams
Dimensions
235x191x6 mm

AHA-BUCH GmbH

Einbeck, Germany

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AbeBooks seller since August 14, 2006

Shipping rates from Germany to U.S.A.

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