An Introduction to RISC V. "Reduced Instruction Set Computer" Processor

Language: English

Published by GRIN Verlag, 2024

3389028420 / 9783389028421

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

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Druck auf Anfrage Neuware - Printed after ordering - Document from the year 2024 in the subject Computer Science, grade: A, , language: English, abstract: RISC-V, an open-source Instruction Set Architecture (ISA), has become a significant performer in the realm of computer architecture, challenging traditional proprietary designs and opening the doors for innovation and customization. Initially in this work, RISC-V¿s historical evolution, its architecture, including its design concepts, instruction set, register file and implementations, were understood through a literature survey.A comprehensive literature survey is conducted on various variants of RISC-V family and their applications, which include lowering total costs, speeding up processor execution, consuming less power, and creating a more manageable and compact versions of the original architecture. The study includes a thorough analysis of several RISC-V variations. According to review of the literature, the 32-bit biRISC-V processor core is the newest member of the RISC-V family and using superscalar dual issue design to increase processor overall throughput.…

Seller Inventory # 9783389028421

Title
An Introduction to RISC V. "Reduced Instruction Set Computer" Processor
Author
Arpita Patel
Publisher
GRIN Verlag
Publication year
2024
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3389028420
ISBN 13
9783389028421
Item weight
68 grams
Dimensions
210x148x4 mm

AHA-BUCH GmbH

Einbeck, Germany

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