JOP: A Java Optimized Processor for Embedded Real-Time Systems

Martin Schoeberl

ISBN 10: 3836480867 / ISBN 13: 9783836480864

Published by VDM Verlag Dr. Müller E.K., 2008

About this Item

nach der Bestellung gedruckt Neuware - Printed after ordering - This thesis presents a Java processor designed for time-predictable execution of real-time tasks. JOP (Java Optimized Processor) is the implementation of the Java virtual machine in hardware. JOP is intended for applications in embedded real-time systems and the primary implementation technology is in a field programmable gate array. This research demonstrates that a hardware implementation of the Java virtual machine results in a small design for resource-constrained devices. Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches and branch prediction. However, these features complicate worst-case execution time (WCET) analysis and lead to very conservative WCET estimates. This thesis tackles this problem from the architectural perspective - by introducing a processor architecture in which simpler and more accurate WCET analysis is more important than average case performance. The proposed processor and the Java real-time profile have been used with success to implement several commercial real-time applications.

Seller Inventory # 9783836480864

Bibliographic Details

• Title: JOP: A Java Optimized Processor for Embedded Real-Time Systems
• Publisher: VDM Verlag Dr. Müller E.K.
• Publication Date: 2008
• Language: English
• ISBN 10: 3836480867
• ISBN 13: 9783836480864
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 220W x 150H x 16D millimeters 220 millimeters width by 150 millimeters height by 16 millimeters depth
• Weight: 399 grams

About this title

Synopsis

This thesis presents a Java processor designed for time-predictable execution of real-time tasks. JOP (Java Optimized Processor) is the implementation of the Java virtual machine in hardware. JOP is intended for applications in embedded real-time systems and the primary implementation technology is in a field programmable gate array. This research demonstrates that a hardware implementation of the Java virtual machine results in a small design for resource-constrained devices. Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches and branch prediction. However, these features complicate worst-case execution time (WCET) analysis and lead to very conservative WCET estimates. This thesis tackles this problem from the architectural perspective - by introducing a processor architecture in which simpler and more accurate WCET analysis is more important than average case performance. The proposed processor and the Java real-time profile have been used with success to implement several commercial real-time applications.

About the Author

Martin Schoeberl received his PhD degree in Computer Engineering fromthe Vienna University of Technology, Austria, in 2005. Since 2005 hehas been assistant professor at the Vienna University of Technology.