The work establishes the design flow for the optimization of linear CMOS power amplifiers from the first steps of the design to the final IC implementation and tests. The authors also focuses on design guidelines of the inductor’s geometrical characteristics for power applications and covers their measurement and characterization. Additionally, a model is proposed which would facilitate designs in terms of transistor sizing, required inductor quality factors or minimum supply voltage. The model considers limitations that CMOS processes can impose on implementation. The book also provides different techniques and architectures that allow for optimization.

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This work describes the design flow for the optimization of linear CMOS power amplifiers from the first steps of the design to the final IC implementation and tests. The authors also focus on design guidelines for the inductor’s geometrical characteristics for power applications and cover their measurement and characterization. Additionally, a model is proposed which facilitates design in terms of transistor sizing, required inductor quality factors or minimum supply voltage. The model considers the limitations that CMOS processes can impose on implementation. The book also details various techniques and architectures that allow for optimization.

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