Logic Minimization Algorithms for VLSI Synthesis

Language: English

Published by Springer, Humana, 2011

1461297842 / 9781461297840

  • Softcover
  • New
See all details

Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

5-star seller

AbeBooks seller since August 14, 2006

View this seller's items
Softcover

Condition: New

US$ 349.07

US$ 34.92 shipping 
Ships from Germany to U.S.A.

Quantity: 1 available

Add to basket
Free 30-day returns

Item description from seller

Druck auf Anfrage Neuware - Printed after ordering - The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.

Seller Inventory # 9781461297840

Title
Logic Minimization Algorithms for VLSI Synthesis
Author
Robert K. Brayton
Publisher
Springer, Humana
Publication year
2011
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
1461297842
ISBN 13
9781461297840
Item weight
324 grams
Dimensions
235x155x12 mm

AHA-BUCH GmbH

Einbeck, Germany

5-star seller

AbeBooks seller since August 14, 2006

Shipping rates from Germany to U.S.A.

Item5 to 7 business days7 to 10 business days
First itemUS$ 34.92US$ 34.92
Delivery times are set by sellers and vary by carrier and location. Orders passing through Customs may face delays and buyers are responsible for any associated duties or fees. Sellers may contact you regarding additional charges to cover any increased costs to ship your items.

Payment methods

  • Visa
  • Mastercard
  • American Express
  • Apple Pay
  • Google Pay
  • Bank Wire Transfer
  • Check
  • Paypal

Store description

Das Unternehmen AHA-BUCH GmbH: Seit der Gründung von AHA-BUCH im Juli 2005 ist unser Hauptziel, zufriedenen Kunden so schnell und so preisgünstig wie möglich ihren Bücherwunsch zu erfüllen. Unsere Firma beschäftigt 16 Mitarbeiter, die nur ein Ziel kennen: den Kunden und seine Wünsche! Auf über 3700 m2 Fläche haben wir über 100.000 Bücher, Modernes Antiquariat und Spiele auf Lager.

Specialty

Kinderbücher & Kinderhör Casetten, German Books, Software, Natur & Tiere, Ratgeber, Sachbücher, Englische Bücher, Medizin & Gesundheit, Universität & Studium

Seller's business information

AHA-BUCH GmbH

Garlebsen 48
Einbeck, Germany 37574