Logic Synthesis for Low Power VLSI Designs

Pedram Massoud Iman Sasan

ISBN 10: 1461374901 / ISBN 13: 9781461374909

Published by Springer, 2012

About this Item

Print on Demand pp. 258 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.

Seller Inventory # 50990461

Bibliographic Details

• Title: Logic Synthesis for Low Power VLSI Designs
• Publisher: Springer
• Publication Date: 2012
• Language: English
• ISBN 10: 1461374901
• ISBN 13: 9781461374909
• Binding: Soft cover
• Condition: New

About this title

Synopsis

Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints.
Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.