Low Power Digital Design using Asynchronous Logic

The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on obtaining low power by implementing asynchronous logic.

This work on Low power digital design using asynchronous logic is my first publication. I did this work as a thesis during my Masters in Electrical Engineering in SJSU. The main reason I was interested in this topic had an environmental concern and that was the amount of power that could be saved by going in for asynchronous design.