MIMO Channel Estimation for FPGA Implementation | Performance and Complexity Improvement of MIMO Channel Estimation for Xilinx Virtex-4 FPGA

Mohammad T. Islam (u. a.)

ISBN 10: 3639267249 / ISBN 13: 9783639267242

Published by VDM Verlag Dr. Müller, 2010

About this Item

MIMO Channel Estimation for FPGA Implementation | Performance and Complexity Improvement of MIMO Channel Estimation for Xilinx Virtex-4 FPGA | Mohammad T. Islam (u. a.) | Taschenbuch | Englisch | VDM Verlag Dr. Müller | EAN 9783639267242 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

Seller Inventory # 101042285

Bibliographic Details

• Title: MIMO Channel Estimation for FPGA Implementation | Performance and Complexity Improvement of MIMO Channel Estimation for Xilinx Virtex-4 FPGA
• Publisher: VDM Verlag Dr. Müller
• Publication Date: 2010
• Language: English
• ISBN 10: 3639267249
• ISBN 13: 9783639267242
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 219W x 149H x 7D millimeters 219 millimeters width by 149 millimeters height by 7 millimeters depth
• Weight: 160 grams
• Seller catalogs:
  • Bücher

About this title

Synopsis

The context for this book is to present a proficient channel estimation technique for performance improvement and complexity reduction of multiple antenna system. Matrix factorization is applied on LS estimation to reduce a full rank matrix into a simpler form in order to eliminate matrix inversion. Results indicate a significant improvement in SNR compared with LS estimation. The complexity comparison is performed in terms of mathematical operations, which shows that the approach outperforms LS estimation at a lower complexity and represents a good solution for channel estimation technique. The book also provides design and implementation of a multiple antenna system on FPGA that provides reconfigurability, resource utilization and less power consumption. The encoder design is straight forward; however, the decoder design is little tricky as it requires resource optimization. The hardware, presented in this book, utilizes the resources by adopting the technique of parallelism. The system is developed based on modular design which simplifies system design, eases hardware update and facilitates testing the various modules in an independent manner.

About the Author

The authors are associated with research on antenna technology for broadband communication. They published their works on scholarly referred international journals and international conferences.