MIPS RISC Architecture
Language: English
Published by Pearson Education, Limited, 1991
- Softcover
- Used
Seller: Better World Books: West, Reno, NV, U.S.A.Better World Books: West
AbeBooks seller since March 14, 2016
Condition: Used - Very good
US$ 10.56
Quantity: 1 available
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Pages intact with possible writing/highlighting. Binding strong with minor wear. Dust jackets/supplements may not be included. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.
Seller Inventory # GRP82717654
- Title
- MIPS RISC Architecture
- Author
- Kane, Gerry, Heinrich, Joseph
- Publisher
- Pearson Education, Limited
- Publication year
- 1991
- Condition
- Very Good
- Binding
- Soft cover
- Language
- English
- ISBN 10
- 0135904722
- ISBN 13
- 9780135904725
- Edition
- 2nd.
- Item weight
- 1.85 pounds
- Dimensions
- N/A
A complete reference manual to the MIPS RISC architecture, this book describes the user Instruction Set Architecture (ISA), by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA. Focusing on the new R4000 and R6000 chips, this book is organized into two major sections: Chapters 1 through 6 describe the characteristics of the CPU, while Chapter 7 through 9 describe the Floating Point Unit (FPU). This book describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor. Also included is an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.
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Better World Books: West
Reno, NV, U.S.A.
AbeBooks seller since March 14, 2016
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