MIPS RISC Architecture
Language: English
Published by Prentice Hall, 1991
- Softcover
- Used
Seller: ThriftBooks-Atlanta, AUSTELL, GA, U.S.A.ThriftBooks-Atlanta
AbeBooks seller since March 24, 2009
Condition: Used - Fair
US$ 18.05
Quantity: 1 available
Add to basketItem description from seller
Readable copy. Pages may have considerable notes/highlighting. ~ ThriftBooks: Read More, Spend Less.
Seller Inventory # G0135904722I5N00
- Title
- MIPS RISC Architecture
- Author
- Kane, Gerry; Heinrich, Joseph
- Publisher
- Prentice Hall
- Publication year
- 1991
- Condition
- Fair
- Dust jacket
- No Jacket
- Binding
- Paperback
- Language
- English
- ISBN 10
- 0135904722
- ISBN 13
- 9780135904725
- Edition
- 2nd Edition
- Item weight
- 1.65 pounds
A complete reference manual to the MIPS RISC architecture, this book describes the user Instruction Set Architecture (ISA), by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA. Focusing on the new R4000 and R6000 chips, this book is organized into two major sections: Chapters 1 through 6 describe the characteristics of the CPU, while Chapter 7 through 9 describe the Floating Point Unit (FPU). This book describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor. Also included is an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.
"Synopsis" may belong to another edition of this title.
From the Back Cover
"About the title" may belong to another edition of this title.
ThriftBooks-Atlanta
AUSTELL, GA, U.S.A.
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