Modeling and Simulation of ARM Processor Architecture : Using SystemC

Mitesh Limachia

ISBN 10: 365912088X / ISBN 13: 9783659120886

Published by LAP Lambert Academic Publishing, 2012

About this Item

nach der Bestellung gedruckt Neuware - Printed after ordering - A software model of processor core created using HDL can serve as the master device to verify functionalities of various slave devices. The hard model available from the manufacture may not be flexible & compatible with the software platform for the verifications. This book presents ARM Cortex- M3 processor model generated with the help of a modeling and verification tool like SystemC having inbuilt functions to reduce coding complexity. ARM Cortex M3 is a 32-bit RISC processor based on Thumb-2 core technology, which enhances performance with higher code densities. Increasing demand of high-end embedded applications such as mobile phones with space, power and cost constraints prefer RISC architecture against CISC. ARM architecture has made instructions simpler with fixed- length and easy pipelining in order to achieve single clock cycle throughput even at higher frequencies.

Seller Inventory # 9783659120886

Bibliographic Details

• Title: Modeling and Simulation of ARM Processor Architecture : Using SystemC
• Publisher: LAP Lambert Academic Publishing
• Publication Date: 2012
• Language: English
• ISBN 10: 365912088X
• ISBN 13: 9783659120886
• Binding: Taschenbuch
• Condition: Neu

About this title

Synopsis

A software model of processor core created using HDL can serve as the master device to verify functionalities of various slave devices. The hard model available from the manufacture may not be flexible & compatible with the software platform for the verifications. This book presents ARM Cortex- M3 processor model generated with the help of a modeling and verification tool like SystemC having inbuilt functions to reduce coding complexity. ARM Cortex – M3 is a 32-bit RISC processor based on Thumb-2 core technology, which enhances performance with higher code densities. Increasing demand of high-end embedded applications such as mobile phones with space, power and cost constraints prefer RISC architecture against CISC. ARM architecture has made instructions simpler with fixed- length and easy pipelining in order to achieve single clock cycle throughput even at higher frequencies.

About the Author

Prof. Mitesh Limachia (Asst. Prof., Dept. of Electronics & Comm. Eng., D. D. University, Nadiad, India) received the M.E. degree from D. D. University, Nadiad. His areas of interest are low power VLSI designs and embedded systems. Dr. Nikhil Kothari (Professor & Head of Dept.) is working in the area of network protocols, besides embedded systems.