Multiprocessor Systems on Chip : Design Space Exploration

This book gives a comprehensive introduction to the design challenges of MPSoC platforms, focusing on early design space exploration. It defines an iterative methodology to increase the abstraction level so that evaluation of design decisions can be performed earlier in the design process. These techniques enable exploration on the system level before undertaking time- and cost-intensive development.

In the domain of embedded systems the contradicting requirements of computational performance, energy efficiency and flexibility, together with the shrinking time-to-market and extremely short product lifecycles, exhibits one of the most challenging assignments in engineering today. System architects are asked to apply new and innovative designs to cope with these challenges. However, the effort for evaluating a single design and the exploration of the virtually unlimited design space requires new exploration techniques. Effective exploration demands a simple and quick identification of suitable implementation candidates, while an efficient evaluation of a single design point requires a detailed analysis of the platform characteristics subject to the application requirements.

This book answers the above challenges by combining analytical- and simulation-based models for evaluation of a single design and enhances the exploration by enabling a smooth transition between these models. Readers benefit from a comprehensive introduction to the design challenges of MPSoC platforms, focusing on early design space exploration. The book defines an iterative methodology to increase the abstraction level so that evaluation of design decisions can be performed earlier in the design process. These techniques enable exploration on the system level before undertaking time- and cost-intensive development.

• Presents a unique methodology for design space exploration of multiprocessor systems-on-chip;
• Describes an abstract simulation-based model, including a virtual processing unit and advanced task modeling, allowing fine-grained performance investigations;
• Demonstrates a simple and quick refinement to state-of-the-art virtual platforms, operating on the paradigm of instruction set simulation, to speed-up the exploration process.