Noise-Shaping All-Digital Phase-Locked Loops | Modeling, Simulation, Analysis and Design

Francesco Brandonisio (u. a.)

ISBN 10: 3319344412 / ISBN 13: 9783319344416

Published by Springer, 2016

About this Item

Noise-Shaping All-Digital Phase-Locked Loops | Modeling, Simulation, Analysis and Design | Francesco Brandonisio (u. a.) | Taschenbuch | Analog Circuits and Signal Processing | xiii | Englisch | 2016 | Springer | EAN 9783319344416 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.

Seller Inventory # 103409345

Bibliographic Details

• Title: Noise-Shaping All-Digital Phase-Locked Loops | Modeling, Simulation, Analysis and Design
• Publisher: Springer
• Publication Date: 2016
• Language: English
• ISBN 10: 3319344412
• ISBN 13: 9783319344416
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 11D millimeters 235 millimeters width by 155 millimeters height by 11 millimeters depth
• Weight: 300 grams
• Seller catalogs:
  • Bücher

About this title

Synopsis

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

From the Back Cover

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

• Discusses in detail a wide range of all-digital phase-locked loops architectures;
• Presents a unified framework in which to model time-to-digital converters for ADPLLs;
• Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs;
• Describes an efficient approach to model ADPLLS;
• Includes Matlab code to reproduce the examples in the book.