Noise-shaping All-digital Phase-locked Loops: Modeling, Simulation, Analysis and Design

Brandonisio, Francesco/ Kennedy, Michael Peter

ISBN 10: 3319036580 / ISBN 13: 9783319036588

Published by Springer Verlag, 2014

About this Item

2014 edition. 212 pages. 9.25x6.25x0.75 inches. In Stock.

Seller Inventory # x-3319036580

Bibliographic Details

• Title: Noise-shaping All-digital Phase-locked Loops: Modeling, Simulation, Analysis and Design
• Publisher: Springer Verlag
• Publication Date: 2014
• Language: English
• ISBN 10: 3319036580
• ISBN 13: 9783319036588
• Binding: Hardcover
• Condition: Brand New
• Weight: 0.41 kilograms

About this title

Synopsis

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

From the Back Cover

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

• Discusses in detail a wide range of all-digital phase-locked loops architectures;
• Presents a unified framework in which to model time-to-digital converters for ADPLLs;
• Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs;
• Describes an efficient approach to model ADPLLS;
• Includes Matlab code to reproduce the examples in the book.