OPENGL GPU Architecture and Implementation of Line Rasterization

Ahmed Khalil

ISBN 10: 3330853913 / ISBN 13: 9783330853911

Published by Noor Publishing, 2017

About this Item

nach der Bestellung gedruckt Neuware - Printed after ordering - The GPU has become an essential block for the embedded system devices. The GPU's main purpose is to accelerate the rendering of images, animations and videos. This process is essential for many devices such as smart phones, tablets, and gaming devices. This book introduces CUGPU, the Cairo University GPU, architecture based on Common-Lite (CL) pro le of the Open Graphics Library for Embedded System 1.1 (OpenGL ES 1.1). CUGPU provides high-performance support of the xed-function 3D graphics pipeline. Moreover, CUGPU can be integrated with the Cairo University SPARC (CUSPARC) processor into a complete embedded system. Two designs of the line rasterization algorithm were implemented using VHDL code and synthesized at the TSMC 65 nm low power technology node. The first design scores a typical clock frequency of 270 MHz and an area of 0.088 mm2. The second design scores a typical clock frequency of 200 MHz and an area of 0.052 mm2.

Seller Inventory # 9783330853911

Bibliographic Details

• Title: OPENGL GPU Architecture and Implementation of Line Rasterization
• Publisher: Noor Publishing
• Publication Date: 2017
• Language: English
• ISBN 10: 3330853913
• ISBN 13: 9783330853911
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 220W x 150H x 12D millimeters 220 millimeters width by 150 millimeters height by 12 millimeters depth
• Weight: 280 grams

About this title

Synopsis

The GPU has become an essential block for the embedded system devices. The GPU’s main purpose is to accelerate the rendering of images, animations and videos. This process is essential for many devices such as smart phones, tablets, and gaming devices. This book introduces CUGPU, the Cairo University GPU, architecture based on Common-Lite (CL) profile of the Open Graphics Library for Embedded System 1.1 (OpenGL ES 1.1). CUGPU provides high-performance support of the fixed-function 3D graphics pipeline. Moreover, CUGPU can be integrated with the Cairo University SPARC (CUSPARC) processor into a complete embedded system. Two designs of the line rasterization algorithm were implemented using VHDL code and synthesized at the TSMC 65 nm low power technology node. The first design scores a typical clock frequency of 270 MHz and an area of 0.088 mm2. The second design scores a typical clock frequency of 200 MHz and an area of 0.052 mm2.

About the Author

Ahmed Khalil received the B.S. and M.S. degrees from the Electronics and Communications Engineering Department, Cairo University, Egypt, in 2011 and 2015, respectively. From 2012 to 2015, he was a teaching assistant at the same department. Currently, he is a PhD student at school of computer engineering, Nanyang Technological University, Singapore.