PARLE Parallel Architectures and Languages Europe: Vol. 2: Parallel Languages, Eindhoven, The Netherlands, June 15-19, 1987; Proceedings (Lecture Notes in Computer Science)

Bakker, Jacobus W. de [Editor]; Nijman, A.J. [Editor]; Treleaven, Philip C. [Editor];

ISBN 10: 3540179453 / ISBN 13: 9783540179450

Published by Springer, 1987

About this Item

Ex-library paperback in very nice condition with the usual markings and attachments. Text block clean and unmarked. Tight binding.

Seller Inventory # DA1411444

Bibliographic Details

• Title: PARLE Parallel Architectures and Languages Europe: Vol. 2: Parallel Languages, Eindhoven, The Netherlands, June 15-19, 1987; Proceedings (Lecture Notes in Computer Science)
• Publisher: Springer
• Publication Date: 1987
• Language: English
• ISBN 10: 3540179453
• ISBN 13: 9783540179450
• Binding: Paperback
• Condition: Very Good
• Weight: 24 ounces

About this title

Synopsis

Learning translation invariant recognition in a massively parallel networks.- Trace theory and systolic computations.- Boltzmann machines and their applications.- Structured specification of a wafer-scale supercomputer.- A novel deadlock free and starvation free packet switching communication processor.- A parallel architecture for signal understanding through inference on uncertain data.- An axiomatic approach to the specification of distributed computer architectures.- Computing on a systolic Hulls, contours and applications.- Multiprocessor systems programming in a high-level data-flow language.- The twisted cube.- An implemented method for incremental systolic design.- The use of parallel functions in system design.- The translation of processes into circuits.- Mapping strategies in message based multiprocessor systems.- Hardware memory management for large knowledge bases.- Transputer-based experiments with the ZAPP architecture.- Synthesis of systolic arrays for inductive problems.- Practical parallelism using transputer arrays.- Systolic array synthesis by static analysis of program dependencies.- Specification of a pipelined event driven simulator using FP2.- A layered emulator for design evaluation of MIMD multiprocessors with shared memory.- The Alliant FX/ A language driven architecture for parallel processing of dusty deck fortran.- Emulating digital logic using transputer networks (very high parallelism = simplicity = performance).- A two-level approach to logic plus functional programming integration.- Overview of a parallel reduction machine project.- An overview of Delta driven computer.- Design and implementation of a parallel inference machine for first order an overview.- Multi-level simulator for VLSI.- The DOOM system and its A survey of esprit 415 subproject A, philips research laboratories.