Performance Modeling for Computer Architects (Systems)
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Language: English
Published by Wiley-IEEE Computer Society Pr, 1995
- Softcover
- New

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- Title
- Performance Modeling for Computer Architects (Systems)
- Publisher
- Wiley-IEEE Computer Society Pr
- Publication year
- 1995
- Condition
- New
- Binding
- Soft cover
- Language
- English
- ISBN 10
- 0818670940
- ISBN 13
- 9780818670947
As computers become more complex, the number and complexity of the tasks facing the computer architect have increased. Computer performance often depends in complex way on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity.
This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.
This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.
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About the Author
C. Mani Krishna is Professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst. He received his PhD in Electrical Engineering from the University of Michigan in 1984.
"About the title" may belong to another edition of this title.
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