Physical Biometrics for Hardware Security of Dsp and Machine Learning Coprocessors
Language: English
Published by The Institution of Engineering and Technology, 2023
- Hardcover
- Used

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- Title
- Physical Biometrics for Hardware Security of Dsp and Machine Learning Coprocessors
- Author
- Sengupta, Anirban
- Publisher
- The Institution of Engineering and Technology
- Publication year
- 2023
- Condition
- As New
- Binding
- Hardcover
- Language
- English
- ISBN 10
- 183953821X
- ISBN 13
- 9781839538216
Physical Biometrics for Hardware Security of DSP and Machine Learning Coprocessors presents state-of-the art explanations for detective control-based security and protection of digital signal processing (DSP) and machine learning coprocessors against hardware threats. Such threats include intellectual property (IP) abuse and misuse, for example, fraudulent claims of IP ownership and IP piracy. DSP coprocessors such as finite impulse response filters, image processing filters, discrete Fourier transform, and JPEG compression hardware are extensively utilized in several real-life applications. Further, machine learning coprocessors such as convolutional neural network (CNN) hardware IP cores play a vital role in several applications such as face recognition, medical imaging, autonomous driving, and biometric authentication, amongst others.
Written by an expert in the field, this book reviews recent advances in hardware security and IP protection of digital signal processing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods.
The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource.
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About the Author
Anirban Sengupta is an associate professor in the Discipline of Computer Science and Engineering at Indian Institute of Technology (IIT) Indore. He has around 270 publications and patents, 50 book chapters and 5 books. He is a recipient of awards/honors such as Fellow of IET, Fellow of British Computer Society, Fellow of IETE, IEEE Chester Sall Memorial Consumer Electronics Award, IEEE Distinguished Lecturer, IEEE Distinguished Visitor, IEEE CESoc Outstanding Editor Award, IEEE CESoc Best Research Award from CEM, Best Research paper Award in IEEE ICCE 2019, IEEE Computer Society TCVLSI Outstanding Editor Award and IEEE TCVLSI Best Paper Award in IEEE iNIS 2017. He held/holds around 17 Editorial positions in IEEE/IET Journals. He is the Editor-in-Chief of IEEE VCAL (Computer Society TCVLSI), Deputy EiC of IET Computers & Digital Techniques and General Chair of 37th IEEE Int'l Conference on Consumer Electronics (ICCE) 2019, Las Vegas. He is consistently ranked in Stanford University's Top 2% Scientists globally across all domains.
"About the title" may belong to another edition of this title.
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