Physical Design for 3d Integrated Circuits

Physical Design for 3D Integrated Circuits reveals how to effectively and optimally design 3D integrated circuits (ICs). It also analyzes the design tools for 3D circuits while exploiting the benefits of 3D technology.

The book begins by offering an overview of physical design challenges with respect to conventional 2D circuits, and then each chapter delivers an in-depth look at a specific physical design topic. This comprehensive reference:

• Contains extensive coverage of the physical design of 2.5D/3D ICs and monolithic 3D ICs
• Supplies state-of-the-art solutions for challenges unique to 3D circuit design
• Features contributions from renowned experts in their respective fields

Physical Design for 3D Integrated Circuits provides a single, convenient source of cutting-edge information for those pursuing 2.5D/3D technology.

Aida Todri-Sanial holds a BS in electrical engineering from Bradley University, IL; an MS in electrical engineering from California State University, Long Beach, CA; and a PhD in electrical and computer engineering from the University of California, Santa Barbara. She has held visiting research positions at Cadence Design Systems, Mentor Graphics, IBM TJ Watson Research Center, and STMicroelectronics. She was a recipient of the John Bardeen Fellowship and an R&D engineer at Fermilab, IL. She is currently a research scientist at CNRS, France and a member of the Microelectronics Department at LIRMM, where she is the group leader of Integration and Design of Energy-Aware Circuits and Systems. Widely published, highly decorated, and an IEEE and ACM member, Dr. Todri-Sanial participates in several international conference committees and serves as an associate editor for IEEE TVLSI journal. She is also engaged with the EPWS and WiTEC.

Chuan Seng Tan holds a BEng in electrical engineering from the University of Malaya, Malaysia; an MEng in advanced materials from the National University of Singapore; and a PhD in electrical engineering from the Massachusetts Institute of Technology, Cambridge. He has been a research engineer with the Institute of Microelectronics, Singapore; an Applied Materials Graduate Fellow; and an intern at Intel Corporation, Oregon. He is currently an associate professor at Nanyang Technological University, Singapore, where he previously served as a Lee Kuan Yew Postdoctoral Fellow and an inaugural Nanyang Assistant Professor. Widely published, Dr. Tan participates in several international conference committees and is a member of the IEEE. He has edited three and co-authored two books, and serves as an associate editor for Elsevier Microelectronics Journal.