Power-Aware Computer Systems | Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003, Revised Papers

Babak Falsafi (u. a.)

ISBN 10: 3540240314 / ISBN 13: 9783540240310

Published by Springer, 2004

About this Item

Power-Aware Computer Systems | Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003, Revised Papers | Babak Falsafi (u. a.) | Taschenbuch | Einband - flex.(Paperback) | Englisch | 2004 | Springer | EAN 9783540240310 | Verantwortliche Person für die EU: Springer Nature Customer Service Center GmbH, Europaplatz 3, 69115 Heidelberg, productsafety[at]springernature[dot]com | Anbieter: preigu.

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Bibliographic Details

• Title: Power-Aware Computer Systems | Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003, Revised Papers
• Publisher: Springer
• Publication Date: 2004
• Language: English
• ISBN 10: 3540240314
• ISBN 13: 9783540240310
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 13D millimeters 235 millimeters width by 155 millimeters height by 13 millimeters depth
• Weight: 359 grams
• Seller catalogs:
  • Bücher

About this title

Synopsis

Welcome to the proceedings of the 3rd Power-Aware Computer Systems (PACS 2003) Workshop held in conjunction with the 36th Annual International Symposium on Microarchitecture (MICRO-36). The increase in power and - ergy dissipation in computer systems has begun to limit performance and has also resulted in higher cost and lower reliability. The increase also implies - ducedbatterylifeinportablesystems.Becauseofthemagnitudeoftheproblem, alllevelsofcomputersystems,includingcircuits,architectures,andsoftware,are being employed to address power and energy issues. PACS 2003 was the third workshop in its series to explore power- and energy-awareness at all levels of computer systems and brought together experts from academia and industry. These proceedings include 14 research papers, selected from 43 submissions, spanningawidespectrumofareasinpower-awaresystems.Wehavegrouped the papers into the following categories: (1) compilers, (2) embedded systems, (3) microarchitectures, and (4) cache and memory systems. The ?rst paper on compiler techniques proposes pointer reuse analysis that is biased by runtime information (i.e., the targets of pointers are determined based on the likelihood of their occurrence at runtime) to map accesses to ener- e?cient memory access paths (e.g., avoid tag match). Another paper proposes compiling multiple programs together so that disk accesses across the programs can be synchronized to achieve longer sleep times in disks than if the programs are optimized separately.