Practical Uvm: Step by Step Examples
Srivatsa Vasudevan
ISBN 10: 0997789603 ISBN 13: 9780997789607
Published by Srivatsa Vasudevan, 2016
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Soft cover
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Synopsis:
The Universal Verification Methodology is an industry standard used by many companies for verifying ASIC devices. In this book, you will find step-by-step instructions, coding guidelines and debugging features of UVM explained clearly using examples. The book also covers the changes from UVM-1.1d to UVM 1.2 and provides details of the enhancements in the upcoming IEEE 1800.2 UVM standard: http://www.accellera.org/community/uvm/faq The Table of Contents, Preface, Foreword from UVM committee members and detailed information on this book is available on www.uvmbook.com.
About the Author: Srivatsa Vasudevan is a Principal Engineer at Synopsys in Mountain View California USA. He works on cutting edge designs and has extensive verification experience. His expertise lies in Methodology, simulation performance and helping teams with complex technical challenges.
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Bibliographic Details
Title: Practical Uvm: Step by Step Examples
Publisher: Srivatsa Vasudevan
Publication Date: 2016
Binding: Soft cover
Condition: Brand New