Prevention of SoC Failure with Cache Write Management Techniques | Cache Write Management Techniques

Sutapa Chatterjee Sarkar

ISBN 10: 6206178854 / ISBN 13: 9786206178859

Published by LAP LAMBERT Academic Publishing, 2024

About this Item

Prevention of SoC Failure with Cache Write Management Techniques | Cache Write Management Techniques | Sutapa Chatterjee Sarkar | Taschenbuch | Englisch | 2024 | LAP LAMBERT Academic Publishing | EAN 9786206178859 | Verantwortliche Person für die EU: SIA OmniScriptum Publishing, Brivibas Gatve 197, 1039 RIGA, LETTLAND, customerservice[at]vdm-vsg[dot]de | Anbieter: preigu.

Seller Inventory # 128566832

Bibliographic Details

• Title: Prevention of SoC Failure with Cache Write Management Techniques | Cache Write Management Techniques
• Publisher: LAP LAMBERT Academic Publishing
• Publication Date: 2024
• Language: English
• ISBN 10: 6206178854
• ISBN 13: 9786206178859
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 220W x 150H x 10D millimeters 220 millimeters width by 150 millimeters height by 10 millimeters depth
• Weight: 250 grams
• Seller catalogs:
  • Bücher

About this title

Synopsis

Advent of Very Large Scale Integration (VLSI) technology, enables embedding of a large class of electronic circuits within a chip. As per Moore's law, transistor counts are getting doubled every two years. Chip multiprocessors (CMPs), therefore, integrates thousands of on-chip cores and multi-layer on-chip cache to support the memory demand of those cores that accredits complex multi-programmed environment. But the large sized cache consumes huge percentage of total power and occupies an appreciable chip floor area. On-chip nonvolatile memory (NVM) is advantageous as compared to SRAM or DRAM. However, NVM more specifically Resistive memories suffer from write endurance issue under workload variation and Malicious attacks. Variable cell lifetime is also observed in such memories. Multiple cells of ReRAM encounters stuck-at faults. Cellular automata (CA) technology is considered almost everywhere in physical and biological systems as powerful models. CA is applied in pattern recognition, networking, cryptography, VLSI testing, computer architecture etc. The objective is to introduce design of a robust ReRAM based memory subsystem for CMPs with cache write management techniques.