Profiling Infrastructure for the Evaluation of Asynchronous Systems

Designing and optimizing large-scale, asynchronouscircuitsis an iterative process that involves synthesis,simulating, benchmarking, and program rewriting.Throughout the design process,one faces innumerable decisions for programtransformation.Intelligent optimization and design-space pruningrequire detailed knowledge of the run-time behaviorof the program.Trace profiling captures typical run-time behaviorand input-dependent behaviorthat cannot be inferred from static analysis alone.This text presents a framework for tracing andanalyzing thesimulated execution of high-level, concurrent programs,as a foundation for iterativeoptimization and synthesis of asynchronous circuits.The framework includes an interactive environment anda library of primitive procedures for handling andquerying trace data.The extensibility of this framework enablescompilation-free development of custom analysis routines.The purpose of this analysis framework is to enablefuture tools to use profile-driven feedback in automatingiterative optimization and design-space exploration.

David graduated from the California Institute of Technology in2001 with a Bachelor of Science with Honors in Electrical Engineering. In 2008, hegraduated as a Ph.D. in Electrical and Computer Engineering from Cornell University. Hecurrently works at Achronix, a fabless semiconductor startup company founded bymembers of his research group.