This book bridges the gap between classical arithmetic circuit design and its quantum computing counterparts. It explores innovative approaches to designing and optimizing arithmetic circuits for quantum computing, offering practical solutions that advance the field. The subject of this book encompasses quantum adders, multipliers, and dividers, highlighting their efficiency improvements and potential real-world applications in areas such as quantum cryptography, machine learning, and optimization tasks.
This book is rooted in a rigorous exploration of both classical and quantum computation, providing readers with a clear progression from classical arithmetic to its quantum equivalents. Methods like quantum circuit depth optimization, resource reduction techniques, and modular arithmetic designs are thoroughly discussed. These topics are of particular interest to researchers, students, and professionals who seek to understand how quantum computing can overcome the limitations of classical hardware.
Special features include detailed diagrams of circuit designs, tables comparing classical and quantum performance metrics, and step-by-step explanations that make complex ideas accessible. Each chapter concludes with key takeaways to reinforce understanding and guide further study. This book also maps these designs to real-world Noisy Intermediate-Scale Quantum (NISQ) hardware, validating their functionality and efficiency. Readers benefit from the book’s clear structure, practical design insights, and coverage of cutting-edge advancements, making it an essential resource for anyone working on the forefront of quantum technology.
Dr. Wang Siyi is a research fellow at Nanyang Technological University, Singapore, under the supervision of Prof. Anupam Chattopadhyay. Her research focuses on quantum computing and cybersecurity, with notable contributions including MalaQ, the first malware targeting ion-trapped quantum computers. She has published extensively on quantum arithmetic, cryptanalysis, and quantum cybersecurity, and her work has been recognized with several awards, including Best Student Presentation at Yale’s Quantum Computer Cybersecurity Symposium, Best Paper at the IFIP/IEEE VLSI-SoC Conference, and Best Poster at AsiaCCS 2025.
Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India, M.Sc. from ALaRI, Switzerland and Ph.D. from RWTH Aachen in 2000, 2002, and 2008, respectively. Presently, he is appointed as an associate professor (with tenure) in College of Computing and Data Science, NTU. His research in the domains of Electronic Design Automation, Post-quantum Cryptography, AI Security and Secure IoT has led to multiple spinoffs and technology transfers. Anupam has served in the TPC of major EDA/VLSI conferences and edited a Springer Major Reference Work on Computer Architectures. Anupam’s research has garnered several best paper awards, most recently in VLSI-SoC 2024 for Quantum adders, and in CHES 2025 for side-channel attack on PQC standard Kyber.
