A Scalable FPGA-Based Network Processor for Scientific Computing: A high bandwidth, low latency 3-dimensional mesh interconnection for massively parallel architectures

Pivanti, Marcello

ISBN 10: 3639492668 / ISBN 13: 9783639492668

Published by Edizioni Accademiche Italiane, 2016

About this Item

140 pages. 8.66x5.91x0.32 inches. In Stock.

Seller Inventory # 3639492668

Bibliographic Details

• Title: A Scalable FPGA-Based Network Processor for Scientific Computing: A high bandwidth, low latency 3-dimensional mesh interconnection for massively parallel architectures
• Publisher: Edizioni Accademiche Italiane
• Publication Date: 2016
• Language: English
• ISBN 10: 3639492668
• ISBN 13: 9783639492668
• Binding: Paperback
• Condition: Brand New
• Weight: 0.25 kilograms

About this title

Synopsis

Several problems in scientific computing require surprisingly large computing power which current HPC commercial systems cannot deliver. The development of application-driven machines has to be taken into account since it can be the only viable and rewarding approach. The properties of the network are relevant for the overall performances, since latencies and low-transfer data rate may negatively affect the execution time. In this book will be presented a high-bandwidth and low-latency Network Processor specifically designed for high-performance computing, undertaking a process of analysis and development, starting from the definition of the hardware level, up to the higher software layers, through the interface with the modern CPUs, operating system management/interaction, the definition of the various user libraries and examples of applications that fully exploit the potential of the system. This Network Processor has been deployed in several massively parallel machines, allowing the maximum effectiveness in the simulation campaigns undertaken.

About the Author

Dr. Marcello Pivanti worked in the field of network processors dedicated to high performance computing since the days of university studies. The experience in FPGA led him to collaborate on the creation of a supercomputer with computing and communications elements entirely implemented in FPGA. He also worked on NA62 experiment at CERN in Geneva.