Secure Processors Part I: Background, Taxonomy for Secure Enclaves and Intel SGX Architecture (Foundations and Trends(r) in Electronic Design Automation)

Costan, Victor, Lebedev, Ilia, Devadas, Srinivas

ISBN 10: 1680833006 / ISBN 13: 9781680833003

Published by Now Publishers Inc, 2017

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Seller Inventory # ERICA75816808330065

Bibliographic Details

• Title: Secure Processors Part I: Background, Taxonomy for Secure Enclaves and Intel SGX Architecture (Foundations and Trends(r) in Electronic Design Automation)
• Publisher: Now Publishers Inc
• Publication Date: 2017
• Language: English
• ISBN 10: 1680833006
• ISBN 13: 9781680833003
• Binding: Paperback
• Condition: New
• Book Type: book

About this title

Synopsis

This manuscript is the first in a two part survey and analysis of the state of the art in secure processor systems, with a specific focus on remote software attestation and software isolation. This manuscript first examines the relevant concepts in computer architecture and cryptography, and then surveys attack vectors and existing processor systems claiming security for remote computation and/or software isolation. This work examines in detail the modern isolation container (enclave) primitive as a means to minimize trusted software given practical trusted hardware and reasonable performance overhead. Specifically, this work examines in detail the programming model and software design considerations of Intel's Software Guard Extensions (SGX), as it is an available and documented enclave-capable system. Part II of this work is a deep dive into the implementation and security evaluation of two modern enclave-capable secure processor systems: SGX and MIT's Sanctum. The complex but insufficient threat model employed by SGX motivates Sanctum, which achieves stronger security guarantees under software attacks with an equivalent programming model. This work advocates a principled, transparent, and well-scrutinized approach to secure system design, and argues that practical guarantees of privacy and integrity for remote computation are achievable at a reasonable design cost and performance overhead.