Simultaneous Switching Noise of CMOS Devices and Systems

Prince John L. Senthinathan Ramesh

ISBN 10: 0792394003 / ISBN 13: 9780792394006

Published by Springer, 1993

About this Item

Print on Demand pp. 232 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

Seller Inventory # 7560513

Bibliographic Details

• Title: Simultaneous Switching Noise of CMOS Devices and Systems
• Publisher: Springer
• Publication Date: 1993
• Language: English
• ISBN 10: 0792394003
• ISBN 13: 9780792394006
• Binding: Hardcover
• Condition: New

About this title

Synopsis

This monograph presents our recent research on Simultaneous Switching Noise (SSN) and related issues for CMOS based systems. Although some SSN related work was previously reported in the literature, it were mainly for Emitter Coupled Logic (ECL) gates using Bipolar Junction Transistors (BJTs). This present work covers in-depth analysis on estimating SSN and its impact for CMOS based devices and systems. At present semiconductor industries are moving towards scaled CMOS devices and reduced supply voltage. SSN together with coupled noise may limit the packing density, and thereby the frequency of operation of packaged systems. Our goal is to provide efficient and yet reliable methodologies and algorithms to estimate the overall noise containment in single chip and multi-chip package assemblies. We hope that the techniques and results described in this book will be useful as guides for design, package, and system engineers and academia working in this area. Through this monograph, we hope that we have shown the necessity of interactions that are essential between chip design, system design and package design engineers to design and manufacture optimal packaged systems. Work reported in this monograph was partially supported by the grant from Semiconductor Research Corporation (SRC Contract No. 92-MP-086).