Skew-Tolerant Circuit Design

Harris, David

ISBN 10: 155860636X / ISBN 13: 9781558606364

Published by Morgan Kaufmann Publishers, 2000

About this Item

Readable copy. Pages may have considerable notes/highlighting. ~ ThriftBooks: Read More, Spend Less.

Seller Inventory # G155860636XI5N00

Bibliographic Details

• Title: Skew-Tolerant Circuit Design
• Publisher: Morgan Kaufmann Publishers
• Publication Date: 2000
• Language: English
• ISBN 10: 155860636X
• ISBN 13: 9781558606364
• Binding: Paperback
• Condition: Fair
• Dust Jacket Condition: No Jacket
• Weight: 1.15 pounds

About this title

Synopsis

As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

• Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial
• Provides incisive instruction and advice punctuated by humorous illustrations
• Includes exercises to test understanding of key concepts and solutions to selected exercises

About the Author

David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons.