The field of Software-Based Self-Test (SBST) has been a topic of extensive research in industry and academia for more than three decades. Despite that an automated self-test generation is still lacking a suitable formalisation for modeling of microprocessors. This book presents a methodology to formalize and automate SBST synthesis and is leading to a reassessment of microprocessor modeling process. The book consists of four logically connected parts, starting with state-of-the-art in the field of SBST and with introductory material on modelling methods. The following parts narrate the problems of microprocessor model synthesis, high-level fault modeling, test data generation, and self-test test program construction. Based on the ground set in the first two parts, the book presents methods of automation of model synthesis and self-test program synthesis. Final part completes the research, incorporating the SBST programs into testing flow of processor-centric boards. The book is intended for use by CAD and test engineers, researchers, graduate students, or as supplementary material for courses on computer architectures, and test or design for testability of digital systems.

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