This book delves into the inner workings of router and switch design in a comprehensive manner that is accessible to a broad audience. It begins by describing the role of switch/routers in a network, then moves on to the functional composition of a switch/router. A comparison of centralized versus distributed design of the architecture is also presented. The author discusses use of bus versus shared-memory for communication within a design, and also covers Quality of Service (QoS) mechanisms and configuration tools.

Written in a simple style and language to allow readers to easily understand and appreciate the material presented, Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems discusses the design of multilayer switches―starting with the basic concepts and on to the basic architectures. It describes the evolution of multilayer switch designs and highlights the major performance issues affecting each design. It addresses the need to build faster multilayer switches and examines the architectural constraints imposed by the various multilayer switch designs. The book also discusses design issues including performance, implementation complexity, and scalability to higher speeds. This resource also:

Summarizes principles of operation and explores the most common installed routers
Covers the design of example architectures (shared bus and memory based architectures), starting from early software based designs
Provides case studies to enhance reader comprehension

Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems is an excellent guide for advanced undergraduate and graduate level students, as well for engineers and researchers working in the field.

About the Author

JAMES AWEYA, PHD, is a Chief Research Scientist at Etisalat British Telecom Innovation Center (EBTIC) in Abu Dhabi, UAE. He has been granted 63 US patents and has published over 54 journal papers, 39 conference papers, and 43 Nortel technical reports. Dr. Aweya is a Senior Member of IEEE.

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