SynDEVS Co-Design Flow : A Hardware / Software Co-Design Flow Based on the Discrete Event System Specification Model of Computation

H. Gregor Molter

ISBN 10: 3658003960 / ISBN 13: 9783658003968

Published by Springer Fachmedien Wiesbaden, Springer Fachmedien Wiesbaden, 2012

About this Item

Druck auf Anfrage Neuware - Printed after ordering - The complexity of modern embedded systems has increased rapidly in the recent past. Introducing models of computation into the design flow has significantly raised the abstraction in system level design of embedded systems. Establishing such high abstraction levels in common hardware /software co-design flows is still in its infancy. H. Gregor Molter develops a hardware / software co-design flow based on the Discrete Event System Specification model of computation. He advocates that such a system level design flow should exploit a timed model of computation to allow a broad application field. The presented design flow will transform timed DEVS models to both synthesizable VHDL source code and embeddable C++ source code.

Seller Inventory # 9783658003968

Bibliographic Details

• Title: SynDEVS Co-Design Flow : A Hardware / Software Co-Design Flow Based on the Discrete Event System Specification Model of Computation
• Publisher: Springer Fachmedien Wiesbaden, Springer Fachmedien Wiesbaden
• Publication Date: 2012
• Language: English
• ISBN 10: 3658003960
• ISBN 13: 9783658003968
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 210W x 148H x 13D millimeters 210 millimeters width by 148 millimeters height by 13 millimeters depth
• Weight: 296 grams

About this title

Synopsis

 The complexity of modern embedded systems has increased rapidly in the recent past. Introducing models of computation into the design flow has significantly raised the abstraction in system level design of embedded systems. Establishing such high abstraction levels in common hardware /software co-design flows is still in its infancy. H. Gregor Molter develops a hardware / software co-design flow based on the Discrete Event System Specification model of computation. He advocates that such a system level design flow should exploit a timed model of computation to allow a broad application field. The presented design flow will transform timed DEVS models to both synthesizable VHDL source code and embeddable C++ source code.

About the Author

H. Gregor Molter completed his doctoral thesis at the department of Integrated Circuits and Systems Lab, Technische Universität Darmstadt, under the supervision of Prof. Dr.-Ing. Sorin A. Huss.