Thread and Data Mapping for Multicore Systems: Improving Communication and Memory Accesses

This book presents a study on how thread and data mapping techniques can be used to improve the  performance of multi-core architectures.

Eduardo Henrique Molina da Cruz graduated, with honors, in Computer Science in the State University of Maringá (UEM) in 2009. He received his master's degree from the Postgraduate Program in Computing in the Informatics Institute of the Federal University of Rio Grande do Sul (UFRGS) in 2012. In 2016, he received his Ph.D., with honors, also by the Postgraduate Program in Computing at the Informatics Institute of the Federal University of Rio Grande do Sul (UFRGS). After the Ph.D., he worked as a postdoctoral researcher at the Federal University of Rio Grande do Sul (UFRGS). His research comprises the areas of computer architecture, operating systems and parallel and distributed processing. It focuses on optimizing the memory access in multicore and manycore architectures, as well as architectures with non-uniform access to memory (NUMA). Currently, he is a professor at Federal Institute of Parana (IFPR).

Matthias Diener received his PhD degree in Computer Science fromthe Federal University of Rio Grande do Sul (UFRGS) and the TU Berlin in 2015. He is currently a postdoctoral researcher at the University of Illinois at Urbana-Champaign. His work focuses on adapting parallel applications to the hardware they are running on, through improving data locality, load balancing, and support for heterogeneous systems.

Philippe O. A. Navaux graduated in electronic engineering from UFRGS in 1970, and received the masters degree in applied physics from UFRGS in 1973 and the Ph.D. degree in computer science from INPG, France in 1979. He is a professor at UFRGS since 1973. He is the head of the Parallel and Distributed Processing Group at UFRGS and a consultant to various national and international funding agencies such as DoE (US), ANR (FR), CNPq, and CAPES (BR).