VHDL Coding and Logic Synthesis with Synopsys
Language: English
Published by Academic Press, 2000
- Softcover
- New

Seller: Revaluation Books, Exeter, United KingdomRevaluation Books
AbeBooks seller since January 6, 2003
Condition: New
US$ 145.14
Quantity: 1 available
Add to basketItem description from seller
420 pages. 9.30x7.40x0.95 inches. This item is printed on demand.
Seller Inventory # zk0123886716
- Title
- VHDL Coding and Logic Synthesis with Synopsys
- Author
- Weng Fook Lee
- Publisher
- Academic Press
- Publication year
- 2000
- Condition
- Brand New
- Binding
- Paperback
- Language
- English
- ISBN 10
- 0123886716
- ISBN 13
- 9780123886712
"Synopsis" may belong to another edition of this title.
From the Back Cover
Apart from these key benefits, this book also contains a full chapter dedicated to showing the reader how a full-scale design project of a pipeline microcontroller can be performed: from architecture definition, instruction set definition, micro-architectural implementation, VHDL coding, and testbench coding, to synthesis optimization.
In the second portion of the book, synthesis is explained in detail with examples showing the reader how to use Synopsysr commands to optimize synthesized designs. This portion of the book also shows the reader many different architectural implementations that can be used to obtain the most efficient design that accomplishes both high-speed performance and minimal area utilization.
Many figures are provided throughout this book, including waveforms from simulation results of testbenches. Detailed explanations are provided for these waveforms, easing the learning curve for the reader to understand how VHDL code functions.
This is a highly practical book for students, engineers, and anyone wishing to learn how to write synthesizable VHDL code and synthesis using Synopsysr.
"About the title" may belong to another edition of this title.
Revaluation Books
Exeter, United Kingdom
AbeBooks seller since January 6, 2003
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Edward Bowditch Ltd
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