VLSI-Analog & Digital Design: Verilog Code for Digital & Analog Design

This book gives the complete information on VHDL & Verilog coding logic for a few analog and digital circuits with their test bench for verification. Hardware Description Language (HDL) is a Computer Aided Design (CAD) tool for the modern design synthesis of digital systems. The recent steady advances in semiconductor technology continue to increase the power and complexity of digital systems. Due to their complexity, such systems cannot be realized using discrete Integrated Circuits (ICs). They are usually realized using high-density programmable chips, such as Application Specified Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) and require sophisticated CAD tools. HDL is an integral part of such tools. HDL offers the author a very efficient tool for implementing and synthesizing design on chips. The author uses HDL to describe the system in a computer language that is similar to several commonly used software languages such as C Debugging. The design is easy, since HDL packages implement simulators and test benches. The two widely used Hardware Description Languages are Very-high-speed integrated circuits Hardware Description Language (VHDL) and Verilog.

B S Manusudhan/ECE/Academy for Technical & Management Excellence,best academic achievement awardee.Core inventor of “CELL BASED INTELLIGENT COUNTERFEIT TELLER” & "A FLASH PACKAGE FOR COORDINATING VTU PRACTICAL EXAMINATION".Published many research papers in international and national level.Working on VLSI for designing "ATME-P2011" processor.