A VLSI Architecture for Concurrent Data Structures (The Springer International Series in Engineering and Computer Science)

Dally, J. W.

ISBN 10: 0898382351 / ISBN 13: 9780898382358

Published by Springer, 1987

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Seller Inventory # ERICA75808983823515

Bibliographic Details

• Title: A VLSI Architecture for Concurrent Data Structures (The Springer International Series in Engineering and Computer Science)
• Publisher: Springer
• Publication Date: 1987
• Language: English
• ISBN 10: 0898382351
• ISBN 13: 9780898382358
• Binding: Hardcover
• Condition: Very Good
• Book Type: book

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Synopsis

Concurrent data structures simplify the development of concurrent programs by encapsulating commonly used mechanisms for synchronization and commu­ nication into data structures. This thesis develops a notation for describing concurrent data structures, presents examples of concurrent data structures, and describes an architecture to support concurrent data structures. Concurrent Smalltalk (CST), a derivative of Smalltalk-80 with extensions for concurrency, is developed to describe concurrent data structures. CST allows the programmer to specify objects that are distributed over the nodes of a concurrent computer. These distributed objects have many constituent objects and thus can process many messages simultaneously. They are the foundation upon which concurrent data structures are built. The balanced cube is a concurrent data structure for ordered sets. The set is distributed by a balanced recursive partition that maps to the subcubes of a binary 7lrcube using a Gray code. A search algorithm, VW search, based on the distance properties of the Gray code, searches a balanced cube in O(log N) time. Because it does not have the root bottleneck that limits all tree-based data structures to 0(1) concurrency, the balanced cube achieves 0C.:N) con­ currency. Considering graphs as concurrent data structures, graph algorithms are pre­ sented for the shortest path problem, the max-flow problem, and graph parti­ tioning. These algorithms introduce new synchronization techniques to achieve better performance than existing algorithms.