VLSI Design for Video Coding
Youn-Long Steve Lin
Sold by buchversandmimpf2000, Emtmannsberg, BAYE, Germany
AbeBooks Seller since January 23, 2017
New - Soft cover
Condition: New
Quantity: 1 available
Add to basketSold by buchversandmimpf2000, Emtmannsberg, BAYE, Germany
AbeBooks Seller since January 23, 2017
Condition: New
Quantity: 1 available
Add to basketThis item is printed on demand - Print on Demand Titel. Neuware -High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 188 pp. Englisch.
Seller Inventory # 9781489983824
High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.
This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.
Back Cover Copy
VLSI Design for Video Coding
By:
Youn-Long Lin
Chao-Yang Kao
Jian-Wen Chen
Hung-Chih Kuo
High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.
This book presents VLSI architectural design and chip implementation for high definition H.264/AVC video encoding with a complete FPGA prototype. It serves as an invaluable reference for anyone interested in VLSI design for video coding.
• Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding;
• Employs massively parallel processing to deliver 1080pHD, with efficient design that can be prototyped via FPGA;
• Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification;
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