VLSI Fault Modeling and Testing Techniques

Language: English

Published by Praeger, 1993

0893917818 / 9780893917814

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

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nach der Bestellung gedruckt Neuware - Printed after ordering - VLSI systems are becoming very complex and difficult to test. Traditional stuck-at fault problems may be inadequate to model possible manufacturing defects in the integrated ciruit. Hierarchial models are needed that are easy to use at the transistor and functional levels. Stuck-open faults present severe testing problems in CMOS circuits, to overcome testing problems testable designs are utilized. Bridging faults are important due to the shrinking geometry of ICs. BIST PLA schemes have common features-controllability and observability - which are enhanced through additional logic and test points. Certain circuit topologies are more easily testable than others. The amount of reconvergent fan-out is a critical factor in determining realistic measures for determining test generation difficulty. Test implementation is usually left until after the VLSI data path has been synthesized into a structural description. This leads to investigation methodologies for performing design synthesis with test incorporation. These topics and more are discussed.…

Seller Inventory # 9780893917814

Title
VLSI Fault Modeling and Testing Techniques
Author
George W. Zobrist
Publisher
Praeger
Publication year
1993
Condition
Neu
Binding
Buch
Language
English
ISBN 10
0893917818
ISBN 13
9780893917814
Item weight
431 grams
Dimensions
222x145x16 mm

AHA-BUCH GmbH

Einbeck, Germany

5-star seller

AbeBooks seller since August 14, 2006

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