VLSI Implementation of MIMO Signal Processing Algorithms

Mahdi Shabany

ISBN 10: 3848497638 / ISBN 13: 9783848497638

Published by LAP LAMBERT Academic Publishing Apr 2012, 2012

About this Item

This item is printed on demand - it takes 3-4 days longer - Neuware -The efficient high-throughput VLSI implementation of near-optimal multiple-input multiple-output (MIMO) detectors for MIMO systems with large number of antennas in high-order quadrature amplitude modulation (QAM) schemes has been a major challenge in the literature. To address this challenge, this book introduces a novel scalable pipelined VLSI ar- chitecture for a 4 X 4 64-QAM MIMO receiver based on K-Best lattice decoders. The key contribution is a means of expanding/visiting the intermediate nodes of the search tree on-demand, rather than exhaustively along with three types of dis- tributed sorters operating in a pipelined structure. The combined expansion and sorting cores are able to find the K best candidates in K clock cycles. The pro- posed architecture has a fixed critical path independent of the constellation order, on-demand expansion scheme, efficient distributed sorters, and is scalable to a higher number of antennas/constellation orders. Fabricated in 0.13um CMOS, it operates at a significantly higher throughput than currently reported schemes. 208 pp. Englisch.

Seller Inventory # 9783848497638

Bibliographic Details

• Title: VLSI Implementation of MIMO Signal Processing Algorithms
• Publisher: LAP LAMBERT Academic Publishing Apr 2012
• Publication Date: 2012
• Language: English
• ISBN 10: 3848497638
• ISBN 13: 9783848497638
• Binding: Taschenbuch
• Condition: Neu

About this title

Synopsis

The efficient high-throughput VLSI implementation of near-optimal multiple-input multiple-output (MIMO) detectors for MIMO systems with large number of antennas in high-order quadrature amplitude modulation (QAM) schemes has been a major challenge in the literature. To address this challenge, this book introduces a novel scalable pipelined VLSI ar- chitecture for a 4 X 4 64-QAM MIMO receiver based on K-Best lattice decoders. The key contribution is a means of expanding/visiting the intermediate nodes of the search tree on-demand, rather than exhaustively along with three types of dis- tributed sorters operating in a pipelined structure. The combined expansion and sorting cores are able to find the K best candidates in K clock cycles. The pro- posed architecture has a fixed critical path independent of the constellation order, on-demand expansion scheme, efficient distributed sorters, and is scalable to a higher number of antennas/constellation orders. Fabricated in 0.13um CMOS, it operates at a significantly higher throughput than currently reported schemes.

About the Author

Mahdi Shabany received the Ph.D. degree in electronics from the University of Toronto in 2008. From 2007 to 2008, he was with Redline Communications Co., Toronto, Canada. Currently he is an assistant professor in the Electrical Engineering Department at Sharif University of technology, Tehran, Iran.